]> 2026-09-08T16:34:31+09:00 Lesson:dram architecture for efficient data lifetime management f27c8820 3000 ko Cold/warm boot 또는 deallocated-page disclosure를 막아야 하는 DRAM 설계에 해당한다. Secure DRAM은 DRAM row마다 live flag를 추가해 dead row의 sense-amplifier 출력을 0으로 gate하고 refresh를 중단한다. 재할당 시 bitline discharge로 남은 charge를 제거하며 OS가 allocation/deallocation 때 flag를 관리한다. S3ResearchAgent low Publication scope: international. Lab publication metadata: 1. Yongjun Lee, Yunkeuk Kim, Jinkyu Jeong, and Jae W. Lee, "DRAM Architecture for Efficient Data Lifetime Management," IEICE Electronics Express, vol. 14, no. 10, Article 20170309, 2017 Verification level: metadata_only. Sources checked: https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_14.20170309/_article/-char/en https://www.jstage.jst.go.jp/article/elex/14/10/14_14.20170309/_pdf 2026-07-16T15:05:27Z 2461238.1287847 Publication record 1: Yongjun Lee, Yunkeuk Kim, Jinkyu Jeong, and Jae W. Lee, "DRAM Architecture for Efficient Data Lifetime Management," IEICE Electronics Express, vol. 14, no. 10, Article 20170309, 2017 실제 Secure DRAM silicon이 아니라 기존 머신에서 command overhead를 모델링한 평가이며 DRAM row-buffer와 OS page 크기가 정렬된다고 가정한다. Technical interpretation: 보안상 데이터 lifetime 종료를 OS의 늦은 zeroing이 아니라 메모리 장치의 접근 제어와 물리적 decay에 연결할 수 있다. DRAM Architecture for Efficient Data Lifetime Management Software zeroing은 SPEC foreground를 최대 11.2%, 기하평균 5.1% 저하시켰지만 Secure DRAM은 약 0.1%였다. 실행시간 표준편차도 20.1% 줄었고 forkbench에서 software 방식은 평균 12.8% slowdown, Secure DRAM은 slowdown이 없었다. 추정 cell-array transistor overhead는 0.3%, 총 chip area overhead는 0.6-0.75%다. Deallocated DRAM page의 민감 데이터를 즉시 보호하면서 software zeroing의 bursty memory traffic을 피할 수 있는가? lab 보안상 데이터 lifetime 종료를 OS의 늦은 zeroing이 아니라 메모리 장치의 접근 제어와 물리적 decay에 연결할 수 있다. Draft 2026-07-18T14:58:27Z 2461240.1239236 2026-07-18T14:58:27Z 2461240.1239236 dram architecture for efficient data lifetime management f27c8820 3000 ev_def69d9de57449ab 2026-07-16T15:05:27Z 2461238.1287847 S3ResearchAgent Yongjun Lee, Yunkeuk Kim, Jinkyu Jeong, and Jae W. Lee, "DRAM Architecture for Efficient Data Lifetime Management," IEICE Electronics Express, vol. 17, no. 10, pp. 1-6, 2017 paper Source: Yonsei University Computer Systems Laboratory publication list supplied by the user. Manifestation 1 of 1. not_recorded dram architecture for efficient data lifetime management f27c8820# 5ae47e7038e69c7a79f3a3ffb3c51ae9 3000 canonical-paper-v2-f27c8820 2026-07-18T05:18:52Z 2461239.7214352 S3ResearchAgent Yongjun Lee, Yunkeuk Kim, Jinkyu Jeong, and Jae W. Lee, "DRAM Architecture for Efficient Data Lifetime Management" IEICE Electronics Express, vol. 17, no. 10, pp. 1-6, 2017 paper 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_dram_architecture_for_efficient_data_lifetime_management_0f2dfdbe. 확인 범위: full_text. 확인한 자료: https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_14.20170309/_article/-char/en ; https://www.jstage.jst.go.jp/article/elex/14/10/14_14.20170309/_pdf. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다. full_text dram architecture for efficient data lifetime management f27c8820# 45446ee7125c9e94b145dc0d86a47a7f 3000 2026-07-18T14:58:26Z 2461240.123912 S3ResearchAgent verify_39d2f4544a7e12ef1a5f partial_source context 보존 원문 객체를 확보했으나 이 일괄 검증에서는 claim-bearing 범위를 재판정하지 않아 결론을 보류함. inconclusive e9d86c3826679d0ab6d0c39df5f4e75aef28697023c7640797bd039ad2034e30 R2-RESTIC:7f893ca5afd2cfb6fe320e9b61063ccc70e75a7a96589420038c8cf338b273be; archive-manifest-sha256=e28171fb69e141ce306d92dfe4b10e6cdc6e81d4fa910c30a846204dbcf8edf8; sha256=e9d86c3826679d0ab6d0c39df5f4e75aef28697023c7640797bd039ad2034e30 보존 파일 objects/sha256/e9/e9d86c3826679d0ab6d0c39df5f4e75aef28697023c7640797bd039ad2034e30 ev_def69d9de57449ab ff31cafd4d5b777c746c7d9214717f7ee6693534eb5d53d6e38a3e2805d8cae5 dram architecture for efficient data lifetime management f27c8820# 98f10f1303dfaecd1b35b6769a4ed2a0 3000 2026-07-18T14:58:27Z 2461240.1239236 S3ResearchAgent verify_9b9994787a7db5a12c93 partial_source context 보존 원문 객체를 확보했으나 이 일괄 검증에서는 claim-bearing 범위를 재판정하지 않아 결론을 보류함. inconclusive e9d86c3826679d0ab6d0c39df5f4e75aef28697023c7640797bd039ad2034e30 R2-RESTIC:7f893ca5afd2cfb6fe320e9b61063ccc70e75a7a96589420038c8cf338b273be; archive-manifest-sha256=e28171fb69e141ce306d92dfe4b10e6cdc6e81d4fa910c30a846204dbcf8edf8; sha256=e9d86c3826679d0ab6d0c39df5f4e75aef28697023c7640797bd039ad2034e30 보존 파일 objects/sha256/e9/e9d86c3826679d0ab6d0c39df5f4e75aef28697023c7640797bd039ad2034e30 canonical-paper-v2-f27c8820 e497683788ee7ba6fb25fa2a24e34233d3225ba0865e01b55b56cd380421458c dram architecture for efficient data lifetime management f27c8820# 3bf7b303068fc9e81a59cb4205b5736a 3000 2026-07-18T14:58:27Z 2461240.1239236 S3ResearchAgent verify_1bbdb89ff1bce07ac0d6 metadata_only observation,interpretation,reusable_lesson claim-bearing O/I/R coverage was not established; confidence forced to low inconclusive e9d86c3826679d0ab6d0c39df5f4e75aef28697023c7640797bd039ad2034e30 R2-RESTIC:7f893ca5afd2cfb6fe320e9b61063ccc70e75a7a96589420038c8cf338b273be; archive-manifest-sha256=e28171fb69e141ce306d92dfe4b10e6cdc6e81d4fa910c30a846204dbcf8edf8; sha256=e9d86c3826679d0ab6d0c39df5f4e75aef28697023c7640797bd039ad2034e30; high-confidence adjudication ledger Saved HTML inspected in full; it is a cookie/landing/generic metadata page and contains no claim-bearing text covering O/I/R. canonical-paper-v2-f27c8820 e497683788ee7ba6fb25fa2a24e34233d3225ba0865e01b55b56cd380421458c dram architecture for efficient data lifetime management f27c8820# 59c2121eac6393d7da257e6d8f720420 3000 2026-07-18T14:58:27Z 2461240.1239236 S3ResearchAgent verify_38a4efa3fc2845950ba2 metadata_only context,attempt Official record contradicts volume 17 and supports 14(10), Article 20170309; method pollution is removed. contradicts e9d86c3826679d0ab6d0c39df5f4e75aef28697023c7640797bd039ad2034e30 R2-RESTIC:7f893ca5afd2cfb6fe320e9b61063ccc70e75a7a96589420038c8cf338b273be; archive-manifest-sha256=e28171fb69e141ce306d92dfe4b10e6cdc6e81d4fa910c30a846204dbcf8edf8; sha256=e9d86c3826679d0ab6d0c39df5f4e75aef28697023c7640797bd039ad2034e30; adjudicated detailed correction DETAILED-CD-003 official J-STAGE record. canonical-paper-v2-f27c8820 e497683788ee7ba6fb25fa2a24e34233d3225ba0865e01b55b56cd380421458c dram architecture for efficient data lifetime management f27c8820# c0434aae385ffe2dea07e3353c526110 Lesson:technical review dram architecture for efficient data lifetime management 0f2dfdbe 3000 ko technical review dram architecture for efficient data lifetime management 0f2dfdbe Supersedes 102 ko Supersedes