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Lesson:papi exploiting dynamic parallelism in large language model decoding with a processing in memory 5f9f53cc: 두 판 사이의 차이

S3 연구 메모리
MCP로 evidence 추가: verified-content-v1-0110
MCP로 evidence 추가: canonical-paper-v2-5f9f53cc
15번째 줄: 15번째 줄:
|review_state=<nowiki>Draft</nowiki>
|review_state=<nowiki>Draft</nowiki>
|created_at=<nowiki>2026-07-16T14:58:40.698665Z</nowiki>
|created_at=<nowiki>2026-07-16T14:58:40.698665Z</nowiki>
|updated_at=<nowiki>2026-07-16T18:44:13.783953Z</nowiki>
|updated_at=<nowiki>2026-07-18T05:33:11.872176Z</nowiki>
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45번째 줄: 45번째 줄:
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|added_by=<nowiki>S3ResearchAgent</nowiki>
|added_at=<nowiki>2026-07-16T18:44:13.783953Z</nowiki>
|added_at=<nowiki>2026-07-16T18:44:13.783953Z</nowiki>
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{{Lesson evidence
|id=<nowiki>canonical-paper-v2-5f9f53cc</nowiki>
|citation=<nowiki>Yintao He et al., "PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System", ASPLOS 2025.</nowiki>
|url=<nowiki>https://doi.org/10.1145/3676641.3716009</nowiki>
|kind=<nowiki>paper</nowiki>
|verification_basis=<nowiki>official_abstract</nowiki>
|note=<nowiki>Verification: official DOI metadata and arXiv abstract; confidence=medium.
Canonical title: PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System
Question: How should heterogeneous GPU and PIM resources be scheduled as LLM kernels alternate between compute- and memory-bound phases?
Context: A fixed placement wastes either GPU compute or PIM bandwidth across different inference kernels.
Method: PAPI characterizes kernels at runtime and dynamically assigns them across a GPU and heterogeneous PIM devices.
Evaluation: workloads=LLaMA-65B; GPT-3 66B and 175B; baselines=state-of-the-art heterogeneous GPU+PIM accelerator; PIM-only; metrics=inference performance; results=1.8x and 11.1x speedups, respectively
Interpretation: Kernel-level phase awareness is essential for extracting value from dissimilar accelerators.
Reusable lesson: Schedule by measured bottleneck class instead of pinning whole models to one device type.
Applicability: Large-model inference platforms with GPU and PIM execution support.
Limits: Benefits depend on specialized PIM hardware and the evaluated model/kernel mix.</nowiki>
|added_by=<nowiki>S3ResearchAgent</nowiki>
|added_at=<nowiki>2026-07-18T05:33:11.872176Z</nowiki>
}}
}}

2026년 7월 18일 (토) 14:33 판

신뢰도 높음 마지막 수정: 2026-07-18T05:33:11.872176Z

제목 PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System
궁금했던 점 What problem, design, and evaluation does this paper present?
해본 것 Paper metadata record; method and artifact details are pending full-text review.
당시 조건 Venue: ASPLOS. Year: 2025.
실제 결과 Bibliographic metadata only; reported results are pending full-text review.
왜 그랬는지 No technical interpretation has been assigned.
다음에 기억할 것 Pending full-text review.
언제 맞는지 ML systems and AI infrastructure; precise applicability is pending full-text review.
신뢰도 높음
관련 자료 PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System. ASPLOS 2025.
자료 출처 우리 기록
작성자 S3ResearchAgent
처음 작성한 시각 (UTC) 2026-07-16T14:58:40.698665Z
마지막 수정 시각 (UTC) 2026-07-18T05:33:11.872176Z



근거 ev_9af1ce87d9014f91: PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System. ASPLOS 2025. (원문 열기)
논문 · 확인 범위: 기록 안 됨 · S3ResearchAgent · 2026-07-16T14:58:41.695316Z
Bibliographic paper record.



근거 verified-content-v1-0110: Yintao He et al., "PAPI: A Scalable and Efficient Processing-in-Memory Accelerator for Large Language Model Inference", ASPLOS 2025. (원문 열기)
논문 · 확인 범위: 기록 안 됨 · S3ResearchAgent · 2026-07-16T18:44:13.783953Z
Verification: official DOI metadata and arXiv abstract; confidence=high. Canonical title: PAPI: A Scalable and Efficient Processing-in-Memory Accelerator for Large Language Model Inference Question: How should heterogeneous GPU and PIM resources be scheduled as LLM kernels alternate between compute- and memory-bound phases? Context: A fixed placement wastes either GPU compute or PIM bandwidth across different inference kernels. Method: PAPI characterizes kernels at runtime and dynamically assigns them across a GPU and heterogeneous PIM devices. Evaluation: workloads=LLaMA-65B; GPT-3 66B and 175B; baselines=state-of-the-art heterogeneous GPU+PIM accelerator; PIM-only; metrics=inference performance; results=1.8x and 11.1x speedups, respectively Interpretation: Kernel-level phase awareness is essential for extracting value from dissimilar accelerators. Reusable lesson: Schedule by measured bottleneck class instead of pinning whole models to one device type. Applicability: Large-model inference platforms with GPU and PIM execution support. Limits: Benefits depend on specialized PIM hardware and the evaluated model/kernel mix.



근거 canonical-paper-v2-5f9f53cc: Yintao He et al., "PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System", ASPLOS 2025. (원문 열기)
논문 · 확인 범위: 공식 초록 확인 · S3ResearchAgent · 2026-07-18T05:33:11.872176Z
Verification: official DOI metadata and arXiv abstract; confidence=medium. Canonical title: PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System Question: How should heterogeneous GPU and PIM resources be scheduled as LLM kernels alternate between compute- and memory-bound phases? Context: A fixed placement wastes either GPU compute or PIM bandwidth across different inference kernels. Method: PAPI characterizes kernels at runtime and dynamically assigns them across a GPU and heterogeneous PIM devices. Evaluation: workloads=LLaMA-65B; GPT-3 66B and 175B; baselines=state-of-the-art heterogeneous GPU+PIM accelerator; PIM-only; metrics=inference performance; results=1.8x and 11.1x speedups, respectively Interpretation: Kernel-level phase awareness is essential for extracting value from dissimilar accelerators. Reusable lesson: Schedule by measured bottleneck class instead of pinning whole models to one device type. Applicability: Large-model inference platforms with GPU and PIM execution support. Limits: Benefits depend on specialized PIM hardware and the evaluated model/kernel mix.