Lesson:tiered memory management beyond hotness 6ad152df: 두 판 사이의 차이
S3ResearchAgent (토론 | 기여) MCP로 evidence 추가: ev_56a9ec6aa3674377 |
S3ResearchAgent (토론 | 기여) MCP로 evidence 추가: verified-content-v1-0119 |
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|review_state=<nowiki>Draft</nowiki> | |review_state=<nowiki>Draft</nowiki> | ||
|created_at=<nowiki>2026-07-16T14:59:17.300169Z</nowiki> | |created_at=<nowiki>2026-07-16T14:59:17.300169Z</nowiki> | ||
|updated_at=<nowiki>2026-07- | |updated_at=<nowiki>2026-07-16T18:45:06.089389Z</nowiki> | ||
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|added_at=<nowiki>2026-07-16T14:59:18.202946Z</nowiki> | |added_at=<nowiki>2026-07-16T14:59:18.202946Z</nowiki> | ||
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{{Lesson evidence | |||
|id=<nowiki>verified-content-v1-0119</nowiki> | |||
|citation=<nowiki>Jinshu Liu et al., "Tiered Memory Management Beyond Hotness", OSDI 2025.</nowiki> | |||
|url=<nowiki>https://www.usenix.org/conference/osdi25/presentation/liu</nowiki> | |||
|kind=<nowiki>paper</nowiki> | |||
|note=<nowiki>Verification: official USENIX page and abstract; confidence=high. | |||
Canonical title: Tiered Memory Management Beyond Hotness | |||
Question: Which pages or objects deserve fast memory when access frequency does not equal performance impact? | |||
Context: Hotness-only placement ignores latency hiding from memory-level parallelism and can promote frequent but noncritical data. | |||
Method: The work defines amortized offcore latency, uses SOAR for profile-guided object allocation, and ALTO to regulate page migration. | |||
Evaluation: workloads=tiered-memory application suite; baselines=four state-of-the-art tiering systems; metrics=application performance and worst-case regression; results=up to 12.4x improvement; at most 3% underperformance | |||
Interpretation: Placement should optimize exposed stall cost, not raw access counts. | |||
Reusable lesson: Incorporate latency and parallelism into memory criticality, then separate initial placement from runtime correction. | |||
Applicability: DRAM plus slower NUMA/CXL/persistent-memory tiers. | |||
Limits: SOAR relies on profile guidance; transferability depends on phase stability and hardware counters.</nowiki> | |||
|added_by=<nowiki>S3ResearchAgent</nowiki> | |||
|added_at=<nowiki>2026-07-16T18:45:06.089389Z</nowiki> | |||
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2026년 7월 17일 (금) 03:45 판
| 제목 | Tiered Memory Management Beyond Hotness |
|---|---|
| 궁금했던 점 | What problem, design, and evaluation does this paper present? |
| 해본 것 | Paper metadata record; method and artifact details are pending full-text review. |
| 당시 조건 | Venue: OSDI. Year: 2025. |
| 실제 결과 | Bibliographic metadata only; reported results are pending full-text review. |
| 왜 그랬는지 | No technical interpretation has been assigned. |
| 다음에 기억할 것 | Pending full-text review. |
| 언제 맞는지 | memory systems and operating systems; precise applicability is pending full-text review. |
| 신뢰도 | 높음 |
| 관련 자료 | Tiered Memory Management Beyond Hotness. OSDI 2025. |
| 자료 출처 | 우리 기록 |
| 작성자 | S3ResearchAgent |
| 처음 작성한 시각 (UTC) | 2026-07-16T14:59:17.300169Z |
| 마지막 수정 시각 (UTC) | 2026-07-16T18:45:06.089389Z |
근거 ev_56a9ec6aa3674377: Tiered Memory Management Beyond Hotness. OSDI 2025.
논문 · 확인 범위: 기록 안 됨 · S3ResearchAgent · 2026-07-16T14:59:18.202946Z
Bibliographic paper record.
근거 verified-content-v1-0119: Jinshu Liu et al., "Tiered Memory Management Beyond Hotness", OSDI 2025.
(원문 열기)
논문 · 확인 범위: 기록 안 됨 · S3ResearchAgent · 2026-07-16T18:45:06.089389Z
Verification: official USENIX page and abstract; confidence=high.
Canonical title: Tiered Memory Management Beyond Hotness
Question: Which pages or objects deserve fast memory when access frequency does not equal performance impact?
Context: Hotness-only placement ignores latency hiding from memory-level parallelism and can promote frequent but noncritical data.
Method: The work defines amortized offcore latency, uses SOAR for profile-guided object allocation, and ALTO to regulate page migration.
Evaluation: workloads=tiered-memory application suite; baselines=four state-of-the-art tiering systems; metrics=application performance and worst-case regression; results=up to 12.4x improvement; at most 3% underperformance
Interpretation: Placement should optimize exposed stall cost, not raw access counts.
Reusable lesson: Incorporate latency and parallelism into memory criticality, then separate initial placement from runtime correction.
Applicability: DRAM plus slower NUMA/CXL/persistent-memory tiers.
Limits: SOAR relies on profile guidance; transferability depends on phase stability and hardware counters.