속성:Evidence note
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자료에서 확인할 수 있는 점이나 한계를 적습니다.
u
Verification: official_abstract; confidence=medium.
Canonical title: USHER: Holistic Interference Avoidance for Resource Optimized ML Inference
Question: How can GPU inference services spatially multiplex models while meeting latency SLOs and avoiding cache/compute/memory interference?
Context: Naive colocation raises utilization but unpredictable inter-model interference lowers goodput and cost efficiency.
Method: USHER combines GPU-kernel resource estimation, an interference-aware scheduler for batch size/replication/placement, and operator-graph merging to reduce cache interference.
Evaluation: workloads=large-scale production ML inference workloads; baselines=existing GPU inference multiplexing methods; metrics=goodput; cost efficiency; latency-SLO compliance; scale; results=up to 2.6x goodput; up to 3.5x cost efficiency; scales to thousands of GPUs
Interpretation: Resource estimation, placement, and graph-level execution must be coordinated to make GPU multiplexing economical.
Reusable lesson: Model interference explicitly and optimize configuration and execution structure together.
Applicability: Large multi-model GPU inference fleets with latency SLOs.
Limits: Estimator and heuristic accuracy depend on model/operator mix, workload stationarity, GPU architecture, and SLOs. +
Bibliographic paper record. +
Verification: abstract_only; confidence=medium.
Canonical title: Using One-Sided RDMA Reads to Build a Fast, CPU-Efficient Key-Value Store
Question: 서버 CPU를 거의 쓰지 않고 RDMA로 KV 읽기를 처리할 수 있는가?
Context: RPC 기반 GET은 네트워크보다 서버 CPU와 소프트웨어 경로가 병목이다.
Method: Pilaf는 self-verifying 자료구조를 one-sided RDMA read로 읽고 쓰기는 서버가 조정한다.
Evaluation: workloads=90%-GET KV workload; baselines=Memcached; Redis; metrics=ops/s per server CPU; results=1.3M ops/s vs 55K Memcached and 59K Redis on one CPU.
Interpretation: 읽기 검증을 클라이언트로 옮기면 서버 CPU 없이 일관된 fast path를 만들 수 있다.
Reusable lesson: read-heavy KV는 one-sided read와 검증 가능한 레이아웃을 결합하라.
Applicability: RDMA read-heavy KV·metadata service.
Limits: 읽기 중심이며 2013년 RDMA 하드웨어·업데이트 경로 결과라 현대 비교가 필요하다. +
Verification: abstract_only; confidence=high.
Canonical title: Using One-Sided RDMA Reads to Build a Fast, CPU-Efficient Key-Value Store
Question: 서버 CPU를 거의 쓰지 않고 RDMA로 KV 읽기를 처리할 수 있는가?
Context: RPC 기반 GET은 네트워크보다 서버 CPU와 소프트웨어 경로가 병목이다.
Method: Pilaf는 self-verifying 자료구조를 one-sided RDMA read로 읽고 쓰기는 서버가 조정한다.
Evaluation: workloads=90%-GET KV workload; baselines=Memcached; Redis; metrics=ops/s per server CPU; results=1.3M ops/s vs 55K Memcached and 59K Redis on one CPU.
Interpretation: 읽기 검증을 클라이언트로 옮기면 서버 CPU 없이 일관된 fast path를 만들 수 있다.
Reusable lesson: read-heavy KV는 one-sided read와 검증 가능한 레이아웃을 결합하라.
Applicability: RDMA read-heavy KV·metadata service.
Limits: 읽기 중심이며 2013년 RDMA 하드웨어·업데이트 경로 결과라 현대 비교가 필요하다. +
utopia fast and efficient address translation via hybrid restrictive flexible virtual to physica 796873cf +
Verification: full_text; confidence=high.
Question: How can address translation approach direct mappings without giving up flexible virtual memory?
Context: Radix page tables incur serialized memory accesses; purely restrictive mappings reduce flexibility.
Method: Utopia places selected pages in restrictive hash-mapped segments and leaves the rest in conventional flexible segments.
Evaluation: workloads=11 data-intensive workloads; baselines=four-level radix page table; ECH; RMM; ideal translation; metrics=performance; page-walk latency; row-buffer conflicts; area; power; results=32% average speedup; 92% of ideal benefit; 69% lower page-walk latency; 20% fewer row-buffer conflicts; 0.74% area and 0.62% power overhead
Interpretation: Applying restrictive mappings selectively captures most translation benefit while preserving a general fallback.
Reusable lesson: Use a fast constrained path for suitable objects and retain a flexible escape path.
Applicability: Translation-intensive CPUs and large-memory applications.
Limits: Results rely on architectural simulation and restrictive-segment allocation; sharing and fragmentation can reduce eligibility. +
utopia fast and efficient address translation via hybrid restrictive flexible virtual to physica 796873cf +
Verification: full_text; confidence=high.
Question: How can address translation approach direct mappings without giving up flexible virtual memory?
Context: Radix page tables incur serialized memory accesses; purely restrictive mappings reduce flexibility.
Method: Utopia places selected pages in restrictive hash-mapped segments and leaves the rest in conventional flexible segments.
Evaluation: workloads=11 data-intensive workloads; baselines=four-level radix page table; ECH; RMM; ideal translation; metrics=performance; page-walk latency; row-buffer conflicts; area; power; results=32% average speedup; 92% of ideal benefit; 69% lower page-walk latency; 20% fewer row-buffer conflicts; 0.74% area and 0.62% power overhead
Interpretation: Applying restrictive mappings selectively captures most translation benefit while preserving a general fallback.
Reusable lesson: Use a fast constrained path for suitable objects and retain a flexible escape path.
Applicability: Translation-intensive CPUs and large-memory applications.
Limits: Results rely on architectural simulation and restrictive-segment allocation; sharing and fragmentation can reduce eligibility. +
utopia fast and efficient address translation via hybrid restrictive flexible virtual to physica 796873cf +
Bibliographic paper record. +
v
Verification: official_abstract; confidence=medium.
Canonical title: vFPIO: A Virtual I/O Abstraction for FPGA-accelerated I/O Devices
Question: How can multiple tenants share FPGA-attached I/O devices with isolation and priorities through one API?
Context: FPGA frameworks expose device-specific interfaces and weakly coordinate contention across PCIe, memory, and network endpoints.
Method: vFPIO provides configurable POSIX-like virtual I/O ports and preemptive transaction scheduling across device classes.
Evaluation: workloads=PCIe, DRAM, HBM, and network I/O on Alveo U280; baselines=Coyote; metrics=abstraction overhead; priority throughput; contention isolation; results=negligible overhead; maximum high-priority throughput preserved under contention
Interpretation: A transaction-level virtual port is a useful common unit for isolation and priority scheduling.
Reusable lesson: Virtualize heterogeneous I/O around a shared scheduling abstraction, not device-specific queues.
Applicability: Multi-tenant FPGA-accelerated I/O services.
Limits: Requires FPGA integration and trusted scheduling policy; evidence is tied to U280/Coyote and evaluated interfaces. +
Bibliographic paper record. +
Verification: official_abstract; confidence=high.
Canonical title: vFPIO: A Virtual I/O Abstraction for FPGA-accelerated I/O Devices
Question: How can multiple tenants share FPGA-attached I/O devices with isolation and priorities through one API?
Context: FPGA frameworks expose device-specific interfaces and weakly coordinate contention across PCIe, memory, and network endpoints.
Method: vFPIO provides configurable POSIX-like virtual I/O ports and preemptive transaction scheduling across device classes.
Evaluation: workloads=PCIe, DRAM, HBM, and network I/O on Alveo U280; baselines=Coyote; metrics=abstraction overhead; priority throughput; contention isolation; results=negligible overhead; maximum high-priority throughput preserved under contention
Interpretation: A transaction-level virtual port is a useful common unit for isolation and priority scheduling.
Reusable lesson: Virtualize heterogeneous I/O around a shared scheduling abstraction, not device-specific queues.
Applicability: Multi-tenant FPGA-accelerated I/O services.
Limits: Requires FPGA integration and trusted scheduling policy; evidence is tied to U280/Coyote and evaluated interfaces. +
Source: Yonsei University Computer Systems Laboratory publication list supplied by the user. Manifestation 3 of 3. +
정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_virtual_asymmetric_multiprocessor_for_interactive_performance_of_consolidated_d_70c3d6f5. 확인 범위: full_text. 확인한 자료: https://doi.org/10.1145/2576195.2576199 ; https://www.sigplan.org/OpenTOC/vee14.html ; https://yonsei.elsevierpure.com/en/publications/virtual-asymmetric-multiprocessor-for-interactive-performance-of-/ ; https://www.researchgate.net/publication/261959390_Virtual_Asymmetric_Multiprocessor_for_Interactive_Performance_of_Consolidated_Desktops ; https://casyslab.kaist.ac.kr/publications. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다. +
Source: Yonsei University Computer Systems Laboratory publication list supplied by the user. Manifestation 2 of 3. +
Source: Yonsei University Computer Systems Laboratory publication list supplied by the user. Manifestation 1 of 3. +
w
Verification: abstract_only; confidence=medium.
Canonical title: WASP: Workload-Aware Self-Replicating Page-Tables for NUMA Servers
Question: NUMA 페이지표 복제를 workload에 따라 자동으로 켜고 끌 수 있는가?
Context: 복제는 page walk를 지역화하지만 update·동기화 비용 때문에 항상 유리하지 않다.
Method: workload indicator와 계층적 점진 메커니즘으로 page-table self-replication을 자동 조절한다.
Evaluation: workloads=x86 and ARM NUMA workloads; baselines=no replication; manual page-table self-replication; metrics=application performance; replication overhead; results=At least the performance improvement of manual PTSR; exact aggregate not abstract-verified.
Interpretation: 복제 이득은 동적이므로 관찰 지표에 기반한 적응형 정책이 필요하다.
Reusable lesson: NUMA 복제는 all-or-nothing 대신 단계적·workload-aware로 운영하라.
Applicability: 대형 NUMA 서버 OS.
Limits: 두 플랫폼과 선정 workload 중심이며 indicator 임계값에 민감하고 초록에 정확한 개선 수치가 없다. +
Bibliographic paper record. +
Verification: abstract_only; confidence=high.
Canonical title: WASP: Workload-Aware Self-Replicating Page-Tables for NUMA Servers
Question: NUMA 페이지표 복제를 workload에 따라 자동으로 켜고 끌 수 있는가?
Context: 복제는 page walk를 지역화하지만 update·동기화 비용 때문에 항상 유리하지 않다.
Method: workload indicator와 계층적 점진 메커니즘으로 page-table self-replication을 자동 조절한다.
Evaluation: workloads=x86 and ARM NUMA workloads; baselines=no replication; manual page-table self-replication; metrics=application performance; replication overhead; results=At least the performance improvement of manual PTSR; exact aggregate not abstract-verified.
Interpretation: 복제 이득은 동적이므로 관찰 지표에 기반한 적응형 정책이 필요하다.
Reusable lesson: NUMA 복제는 all-or-nothing 대신 단계적·workload-aware로 운영하라.
Applicability: 대형 NUMA 서버 OS.
Limits: 두 플랫폼과 선정 workload 중심이며 indicator 임계값에 민감하고 초록에 정확한 개선 수치가 없다. +
we ain t afraid of no file fragmentation causes and prevention of its performance impact on mode 9a366dfb +
Bibliographic paper record. +
we ain t afraid of no file fragmentation causes and prevention of its performance impact on mode 9a366dfb +
Verification: abstract_only; confidence=medium.
Canonical title: We Ain't Afraid of No File Fragmentation: Causes and Prevention of Its Performance Impact on Modern Flash SSDs
Question: 현대 SSD에서 파일 단편화가 느린 진짜 원인을 제거할 수 있는가?
Context: 요청 분할보다 NAND die 충돌이 단편화 성능 저하의 주원인이다.
Method: NVMe 확장과 page-to-die 인지 할당으로 단편 조각을 병렬 die에 배치한다.
Evaluation: workloads=commercial SSD and emulator; 162 MB SQLite file with 10,011 fragments; baselines=conventional allocation; metrics=fragmentation-induced slowdown; results=3.5% slowdown vs 40% conventional.
Interpretation: 논리적 연속성보다 물리적 die 병렬성을 보존하는 것이 중요하다.
Reusable lesson: SSD 단편화는 요청 개수 대신 내부 자원 충돌 관점에서 진단하라.
Applicability: 플래시 SSD 파일시스템·FTL 공동 설계.
Limits: 컨트롤러/NVMe 변경과 SSD 매핑 정보가 필요하다. +
we ain t afraid of no file fragmentation causes and prevention of its performance impact on mode 9a366dfb +
Verification: abstract_only; confidence=high.
Canonical title: We Ain't Afraid of No File Fragmentation: Causes and Prevention of Its Performance Impact on Modern Flash SSDs
Question: 현대 SSD에서 파일 단편화가 느린 진짜 원인을 제거할 수 있는가?
Context: 요청 분할보다 NAND die 충돌이 단편화 성능 저하의 주원인이다.
Method: NVMe 확장과 page-to-die 인지 할당으로 단편 조각을 병렬 die에 배치한다.
Evaluation: workloads=commercial SSD and emulator; 162 MB SQLite file with 10,011 fragments; baselines=conventional allocation; metrics=fragmentation-induced slowdown; results=3.5% slowdown vs 40% conventional.
Interpretation: 논리적 연속성보다 물리적 die 병렬성을 보존하는 것이 중요하다.
Reusable lesson: SSD 단편화는 요청 개수 대신 내부 자원 충돌 관점에서 진단하라.
Applicability: 플래시 SSD 파일시스템·FTL 공동 설계.
Limits: 컨트롤러/NVMe 변경과 SSD 매핑 정보가 필요하다. +