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- Lesson:fast flexible and practical kernel extensions 9eb8897f + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=medium.</br>Canonical title: Fast, Flexible, and Practical Kernel Extensions</br>Question: Can kernel extensions be more expressive than eBPF while preserving kernel safety and practical deployment?</br>Context: eBPF's verifier restricts programs; general native extensions make kernel resources vulnerable to extension faults.</br>Method: KFlex separates kernel-resource safety from extension-resource safety, using automated verification plus lightweight runtime checks while remaining backward-compatible with eBPF.</br>Evaluation: workloads=diverse kernel extensions and end-to-end applications; baselines=eBPF and existing extension mechanisms; metrics=performance; expressiveness; safety overhead; results=qualitative significant benefit; no numeric headline verified</br>Interpretation: Safety can be decomposed by ownership, allowing stronger guarantees for kernel state without proving every extension invariant statically.</br>Reusable lesson: Scope verification to shared critical resources and enforce private-state safety with cheaper runtime controls.</br>Applicability: Linux networking, observability, and in-kernel extension frameworks.</br>Limits: Runtime checks, cancellation, and verifier assumptions remain in the TCB; full upstream integration is incomplete.l upstream integration is incomplete.)
- Lesson:shiftlock mitigate one sided rdma lock contention via handover a5d67e63 + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=high.</br>Canonical title: ShiftLock: Mitigate One-sided RDMA Lock Contention via Handover</br>Question: Can one-sided RDMA locks avoid retry storms and server-NIC IOPS collapse under contention?</br>Context: Clients repeatedly fail atomic acquisition of a held lock, inflating tail latency and consuming lock-server inbound IOPS.</br>Method: ShiftLock uses nonblocking direct client-to-client handover inspired by MCS queues, with reader-writer semantics, starvation freedom, CPU efficiency, and fault handling.</br>Evaluation: workloads=RDMA lock microbenchmarks; transaction workloads; baselines=existing one-sided RDMA locks; metrics=goodput; tail latency; transaction goodput; results=up to 3.62x microbenchmark goodput; up to 76.6% lower tail latency; up to 2.85x transaction goodput</br>Interpretation: Explicit ownership transfer replaces remote contention with local waiting and bounded coordination.</br>Reusable lesson: Under high contention, hand work directly to a known successor instead of reopening global competition.</br>Applicability: RDMA-based distributed storage and transaction systems.</br>Limits: Requires client coordination and recovery for failures; gains depend on contention, network, and lock workload.on contention, network, and lock workload.)
- Lesson:can zns ssds be better storage devices for persistent cache 3ff8980a + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=medium.</br>Canonical title: Can ZNS SSDs be Better Storage Devices for Persistent Cache?</br>Question: Which integration design lets persistent caches exploit ZNS SSD capacity and host-controlled garbage collection despite update-heavy writes?</br>Context: Block SSD cache updates trigger internal garbage collection and write amplification; ZNS exposes sequential zones but requires host management.</br>Method: The study compares three adaptations: a zone-aware file-system cache, a cache-unit-to-zone aligned design, and a lightweight region-management layer between CacheLib and ZNS.</br>Evaluation: workloads=Cachebench; RocksDB with ZNS secondary cache; baselines=compatible regular SSD; F2FS-based cache; three ZNS integration schemes; metrics=throughput; cache hit ratio; write amplification; capacity; results=qualitative tradeoff study; no numeric result in primary abstract</br>Interpretation: ZNS benefits are largest when cache eviction/allocation and zone lifecycle are co-designed rather than hidden below a block interface.</br>Reusable lesson: Align application reclamation units with device erase/management units when the host controls placement.</br>Applicability: CacheLib-like persistent flash caches on ZNS SSDs.</br>Limits: Workshop exploration with three schemes; results depend on cache-unit/zone sizes, workload locality, ZNS device, and recovery design.locality, ZNS device, and recovery design.)
- Lesson:scalable billion point approximate nearest neighbor search using smartssds 3c4169e5 + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=high.</br>Canonical title: Scalable Billion-point Approximate Nearest Neighbor Search Using SmartSSDs</br>Question: How can billion-point ANN search scale beyond host memory while using SmartSSD compute and bandwidth efficiently?</br>Context: Host-only search is capacity/bandwidth limited; naive computational-storage partitioning wastes device work and data movement.</br>Method: SmartANNS combines host/SmartSSD hierarchical indexes, dynamic task scheduling, data reuse, and learned shard pruning.</br>Evaluation: workloads=billion-scale ANN datasets; commercial Samsung SmartSSDs; baselines=CSDANNS; metrics=QPS; recall; multi-SSD scalability; results=up to 10.7x QPS; near-linear scaling</br>Interpretation: Near-data ANN needs coordinated indexing, pruning, and scheduling, not simple operator offload.</br>Reusable lesson: Partition both the search space and control plane across host and near-data compute.</br>Applicability: Large vector-search services using computational storage.</br>Limits: Depends on SmartSSD hardware, learned pruning accuracy, index configuration, and evaluated datasets.dex configuration, and evaluated datasets.)
- Lesson:cost efficient large language model serving for multi turn conversations with cachedattention aa200b5c + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=medium.</br>Question: How can multi-turn LLM services reuse prior-turn KV state without consuming scarce GPU memory?</br>Context: Recomputing the conversation prefix wastes prefill work; retaining every KV cache on GPU limits concurrency.</br>Method: CachedAttention stores KV state hierarchically, preloads and saves it layer by layer, coordinates fetch/eviction with scheduling, and decouples position encoding from truncation.</br>Evaluation: workloads=multi-turn LLM conversations; baselines=recompute and GPU-resident KV-cache serving; metrics=TTFT; prefill throughput; end-to-end cost; results=up to 87% lower TTFT; up to 7.8x prefill throughput; up to 70% lower cost</br>Interpretation: KV persistence is effective when storage movement is overlapped at layer granularity and made scheduler-visible.</br>Reusable lesson: Persist reusable intermediate state below the accelerator and pipeline its movement with computation.</br>Applicability: Multi-turn chatbot and agent services with repeated conversation prefixes.</br>Limits: Benefits depend on prefix reuse, storage bandwidth/capacity, context truncation, and scheduler locality.ontext truncation, and scheduler locality.)
- Lesson:fetchbpf customizable prefetching policies in linux with ebpf 9756cb90 + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=medium.</br>Question: Can Linux memory-prefetch policies be customized safely without maintaining kernel forks?</br>Context: Kernel-resident prefetch policies are hard to prototype, deploy, and tailor per workload.</br>Method: FetchBPF exposes memory-prefetch hooks and policy state through eBPF, enabling verified user-defined policies in a stock-kernel framework.</br>Evaluation: workloads=prefetch policies reproduced from prior work; baselines=equivalent native-kernel policies; metrics=runtime overhead; prefetch effectiveness; results=negligible framework overhead</br>Interpretation: A constrained programmable interface can preserve performance while shortening policy iteration and deployment.</br>Reusable lesson: Move policy into a safe extension layer while keeping mechanisms in the kernel.</br>Applicability: Linux VM prefetch experimentation and workload-specific deployment.</br>Limits: The demonstrated domain is prefetching; eBPF verifier and helper interfaces bound policy expressiveness.er interfaces bound policy expressiveness.)
- Lesson:fetchbpf customizable prefetching policies in linux with ebpf 9756cb90 + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=high.</br>Question: Can Linux memory-prefetch policies be customized safely without maintaining kernel forks?</br>Context: Kernel-resident prefetch policies are hard to prototype, deploy, and tailor per workload.</br>Method: FetchBPF exposes memory-prefetch hooks and policy state through eBPF, enabling verified user-defined policies in a stock-kernel framework.</br>Evaluation: workloads=prefetch policies reproduced from prior work; baselines=equivalent native-kernel policies; metrics=runtime overhead; prefetch effectiveness; results=negligible framework overhead</br>Interpretation: A constrained programmable interface can preserve performance while shortening policy iteration and deployment.</br>Reusable lesson: Move policy into a safe extension layer while keeping mechanisms in the kernel.</br>Applicability: Linux VM prefetch experimentation and workload-specific deployment.</br>Limits: The demonstrated domain is prefetching; eBPF verifier and helper interfaces bound policy expressiveness.er interfaces bound policy expressiveness.)
- Lesson:fast trapless kernel probes everywhere 781e739b + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=medium.</br>Canonical title: Fast (Trapless) Kernel Probes Everywhere</br>Question: Can Linux Kprobes avoid trap overhead without sacrificing broad kernel-code coverage?</br>Context: Standard Kprobes trap on every hit; optimized probes are faster but cannot instrument much kernel code.</br>Method: The compiler/linker places strategic NOPs that a transparent Kprobe implementation can patch into trapless probes across nearly all code.</br>Evaluation: workloads=Linux kernel probe sites; baselines=standard Kprobe; prior optimized Kprobe; metrics=probe cost; kernel-code coverage; results=10x probe performance; 96% coverage vs about 80%</br>Interpretation: Small compile-time layout support removes a runtime observability tax while preserving compatibility.</br>Reusable lesson: Reserve cheap patch points during build time for production-safe dynamic instrumentation.</br>Applicability: Linux tracing, observability, and security instrumentation.</br>Limits: Needs toolchain/kernel-layout changes; some code and architectures remain unsupported.code and architectures remain unsupported.)
- Lesson:asymmetric raid rethinking raid for ssd heterogeneity bfd97257 + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=medium.</br>Canonical title: Asymmetric RAID: Rethinking RAID for SSD Heterogeneity</br>Question: Can RAID use heterogeneous SSD capacity and performance without forcing symmetric participation in every stripe?</br>Context: Conventional RAID assumes similar devices and lets the weakest member constrain capacity or speed.</br>Method: Asymmetric RAID distributes data unevenly and exposes different portions of stripe address space to devices for placement according to their characteristics.</br>Evaluation: workloads=; baselines=symmetric RAID; metrics=capacity utilization; performance; rebuild behavior; results=no quantitative result verified</br>Interpretation: Stripe geometry can be a placement policy rather than a fixed equal partition.</br>Reusable lesson: Represent heterogeneous capacity/performance explicitly instead of normalizing every device to the minimum.</br>Applicability: RAID arrays containing heterogeneous SSDs.</br>Limits: Preliminary workshop work; accessible primary sources do not provide a complete evaluation, recovery analysis, or numbers.evaluation, recovery analysis, or numbers.)
- Lesson:asymmetric raid rethinking raid for ssd heterogeneity bfd97257 + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=medium.</br>Canonical title: Asymmetric RAID: Rethinking RAID for SSD Heterogeneity</br>Question: Can RAID use heterogeneous SSD capacity and performance without forcing symmetric participation in every stripe?</br>Context: Conventional RAID assumes similar devices and lets the weakest member constrain capacity or speed.</br>Method: Asymmetric RAID distributes data unevenly and exposes different portions of stripe address space to devices for placement according to their characteristics.</br>Evaluation: workloads=; baselines=symmetric RAID; metrics=capacity utilization; performance; rebuild behavior; results=no quantitative result verified</br>Interpretation: Stripe geometry can be a placement policy rather than a fixed equal partition.</br>Reusable lesson: Represent heterogeneous capacity/performance explicitly instead of normalizing every device to the minimum.</br>Applicability: RAID arrays containing heterogeneous SSDs.</br>Limits: Preliminary workshop work; accessible primary sources do not provide a complete evaluation, recovery analysis, or numbers.evaluation, recovery analysis, or numbers.)
- Lesson:kangaroo caching billions of tiny objects on flash 90226bd8 + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=high.</br>Canonical title: Kangaroo: Caching Billions of Tiny Objects on Flash</br>Question: Can a flash cache store billions of roughly 100-byte objects with both tiny DRAM metadata and low flash write amplification?</br>Context: Set-associative caches minimize DRAM but rewrite flash often; log-structured caches amortize writes but need large DRAM indexes.</br>Method: Kangaroo combines a large set-associative KSet with a small log-structured KLog that batches objects before rewriting sets.</br>Evaluation: workloads=Facebook traces; Twitter traces; production Facebook deployment; baselines=best prior DRAM-optimized flash cache; best prior write-optimized flash cache; metrics=miss ratio; DRAM bits/object; flash writes; results=29% fewer misses than state of the art; Pareto-optimal across evaluated budgets</br>Interpretation: A small write-optimized admission/staging tier can make a DRAM-efficient main cache write-efficient too.</br>Reusable lesson: Combine complementary cache organizations at unequal sizes to bridge conflicting metadata and write objectives.</br>Applicability: Large flash caches for social, IoT, and other tiny-object workloads.</br>Limits: Tradeoffs depend on object-size distribution, write budget, DRAM/flash sizing, trace locality, and set contention.izing, trace locality, and set contention.)
- Lesson:understanding silent data corruptions in a large production cpu population 56bebc4c + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=high.</br>Canonical title: Understanding Silent Data Corruptions in a Large Production CPU Population</br>Question: What do processor silent data corruptions look like in production, and how do vulnerable features, reproducibility, and environmental triggers affect mitigation?</br>Context: Traditional tests miss silent computation errors, leaving little field evidence for fault models or fleet policy.</br>Method: The study analyzes SDCs across more than one million production processors, tests reproducibility and triggers such as temperature, and derives mitigation implications.</br>Evaluation: workloads=production population of over one million processors; baselines=existing production CPU testing practices; metrics=SDC incidence; reproducibility; feature vulnerability; trigger conditions; results=field taxonomy over >1M CPUs; no numeric fleet rate stated in accessible primary abstract</br>Interpretation: SDC policy must distinguish stable, testable faults from intermittent environment-dependent faults.</br>Reusable lesson: Build reliability controls from field-derived fault classes and trigger conditions, not a single synthetic fault rate.</br>Applicability: Hyperscale CPU qualification, fleet monitoring, and SDC mitigation.</br>Limits: Production data and CPU population are provider-specific; sensitive rates and all sampling biases are not exposed in the abstract.pling biases are not exposed in the abstract.)
- Lesson:twinpilots a new computing paradigm for gpu cpu parallel llm inference aa39d085 + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=high.</br>Canonical title: TwinPilots: A New Computing Paradigm for GPU-CPU Parallel LLM Inference</br>Question: Can CPU and GPU execute different LLM operators concurrently when the model exceeds GPU memory?</br>Context: Conventional offloading serializes transfer and GPU work, leaving CPU compute underused.</br>Method: TwinPilots schedules asymmetric CPU/GPU multiprocessing, balances operator work, and hides data transfer behind CPU execution.</br>Evaluation: workloads=OPT/Llama 13B, 30B, 33B; NVIDIA A10G 24 GB; AMD EPYC 7R32 256 GB; baselines=state-of-the-art CPU-offload schemes; metrics=throughput; data-transfer cost; results=up to 3.39x throughput; 72.1% lower transfer cost</br>Interpretation: CPU computation can be a first-class parallel lane rather than only a staging mechanism for GPU offload.</br>Reusable lesson: Overlap heterogeneous compute and movement by assigning complementary operators to each processor.</br>Applicability: Single-server LLM inference with GPU-memory-constrained models.</br>Limits: Evidence is tied to one CPU/GPU server and selected models; gains depend on operator balance and host memory bandwidth.perator balance and host memory bandwidth.)
- Lesson:stem streaming based fpga acceleration for large scale compactions in lsm kv d204166c + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=medium.</br>Question: How can FPGA compaction scale to large LSM runs without materializing oversized intermediate data?</br>Context: Large-scale merge/compaction is CPU- and I/O-intensive, and rigid FPGA pipelines scale poorly across run sizes.</br>Method: STEM uses clean-cut streaming compaction, a multi-unit FPGA pipeline, and dynamic pipeline scheduling.</br>Evaluation: workloads=large-scale LSM compactions; baselines=RocksDB compaction; state-of-the-art FPGA compaction accelerator; metrics=compaction speedup; pipeline utilization; results=27x average and 35x maximum vs RocksDB; 2.09–2.27x vs prior FPGA accelerator</br>Interpretation: Streaming boundaries and elastic pipeline allocation are central to sustaining accelerator utilization.</br>Reusable lesson: Design data-reorganization accelerators around streaming partitions and dynamically scheduled units.</br>Applicability: Large-scale LSM compaction on FPGA-enabled storage servers.</br>Limits: Benefits depend on FPGA resources, host/storage balance, and the evaluated compaction distributions.nd the evaluated compaction distributions.)
- Lesson:usher holistic interference avoidance for resource optimized ml inference 74231fc1 + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=high.</br>Canonical title: USHER: Holistic Interference Avoidance for Resource Optimized ML Inference</br>Question: How can GPU inference services spatially multiplex models while meeting latency SLOs and avoiding cache/compute/memory interference?</br>Context: Naive colocation raises utilization but unpredictable inter-model interference lowers goodput and cost efficiency.</br>Method: USHER combines GPU-kernel resource estimation, an interference-aware scheduler for batch size/replication/placement, and operator-graph merging to reduce cache interference.</br>Evaluation: workloads=large-scale production ML inference workloads; baselines=existing GPU inference multiplexing methods; metrics=goodput; cost efficiency; latency-SLO compliance; scale; results=up to 2.6x goodput; up to 3.5x cost efficiency; scales to thousands of GPUs</br>Interpretation: Resource estimation, placement, and graph-level execution must be coordinated to make GPU multiplexing economical.</br>Reusable lesson: Model interference explicitly and optimize configuration and execution structure together.</br>Applicability: Large multi-model GPU inference fleets with latency SLOs.</br>Limits: Estimator and heuristic accuracy depend on model/operator mix, workload stationarity, GPU architecture, and SLOs. stationarity, GPU architecture, and SLOs.)
- Lesson:can zns ssds be better storage devices for persistent cache 3ff8980a + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=high.</br>Canonical title: Can ZNS SSDs be Better Storage Devices for Persistent Cache?</br>Question: Which integration design lets persistent caches exploit ZNS SSD capacity and host-controlled garbage collection despite update-heavy writes?</br>Context: Block SSD cache updates trigger internal garbage collection and write amplification; ZNS exposes sequential zones but requires host management.</br>Method: The study compares three adaptations: a zone-aware file-system cache, a cache-unit-to-zone aligned design, and a lightweight region-management layer between CacheLib and ZNS.</br>Evaluation: workloads=Cachebench; RocksDB with ZNS secondary cache; baselines=compatible regular SSD; F2FS-based cache; three ZNS integration schemes; metrics=throughput; cache hit ratio; write amplification; capacity; results=qualitative tradeoff study; no numeric result in primary abstract</br>Interpretation: ZNS benefits are largest when cache eviction/allocation and zone lifecycle are co-designed rather than hidden below a block interface.</br>Reusable lesson: Align application reclamation units with device erase/management units when the host controls placement.</br>Applicability: CacheLib-like persistent flash caches on ZNS SSDs.</br>Limits: Workshop exploration with three schemes; results depend on cache-unit/zone sizes, workload locality, ZNS device, and recovery design.locality, ZNS device, and recovery design.)
- Lesson:scalaafa constructing user space all flash array engine with holistic designs 396837bd + (Verification: official_abstract; confidenc … Verification: official_abstract; confidence=high.</br>Question: How can a user-space all-flash-array engine scale while preserving permissions, parity efficiency, and metadata durability?</br>Context: Kernel paths and fragmented array services can bottleneck modern SSDs and make parity/background work contend with foreground I/O.</br>Method: ScalaAFA combines message-passing permission control, SSD-offloaded background I/O/parity, placement for in-situ parity, and low-amplification persistent metadata.</br>Evaluation: workloads=all-flash-array workloads; names not stated in abstract; baselines=state-of-the-art AFA engines; metrics=write throughput; average write latency; results=2.5x write throughput; 52.7% lower average write latency</br>Interpretation: Co-designing the user-space data path, placement, parity, and metadata avoids moving the bottleneck between layers.</br>Reusable lesson: Optimize the full storage control/data path, including background and recovery work, as one system.</br>Applicability: High-performance user-space all-flash arrays.</br>Limits: The design assumes SSD offload capabilities and its evaluated hardware/software stack.and its evaluated hardware/software stack.)
- Lesson:pruneoff offloading lsm read path pruning in disaggregated key value stores f03d7e8e + (Verification: unresolved; title-only searc … Verification: unresolved; title-only search with no public primary source found; confidence=low.</br>Canonical title: PruneOff: Offloading LSM Read-Path Pruning in Disaggregated Key-Value Stores</br>Question:</br>Context:</br>Method:</br>Evaluation: workloads=; baselines=; metrics=; results=</br>Interpretation:</br>Reusable lesson:</br>Applicability:</br>Limits: No publicly accessible primary-source paper, publisher record, DOI, author manuscript, or official program entry was located; content and publication status cannot be verified.and publication status cannot be verified.)
- Lesson:pruneoff offloading lsm read path pruning in disaggregated key value stores f03d7e8e + (Verification: unresolved; title-only searc … Verification: unresolved; title-only search with no public primary source found; confidence=low.</br>Canonical title: PruneOff: Offloading LSM Read-Path Pruning in Disaggregated Key-Value Stores</br>Question: </br>Context: </br>Method: </br>Evaluation: workloads=; baselines=; metrics=; results=</br>Interpretation: </br>Reusable lesson: </br>Applicability: </br>Limits: No publicly accessible primary-source paper, publisher record, DOI, author manuscript, or official program entry was located; content and publication status cannot be verified.and publication status cannot be verified.)
- Lesson:beyond static policies dynamic prac for balanced and efficient rowhammer mitigation edd7af08 + (Yonsei University Computer Systems Laboratory publication list; authors: Jeonghyun Lee, Minwoo Ahn, Jisung Park, Jinkyu Jeong.)
- Lesson:dwkv metric mismatch + (aggregate objective와 premium SLO miss의 상반된 결과 및 KV term의 single-seed caveat를 확인함.)
- Lesson:inf2 high throughput generative inference of large language models using near storage processing 3fcead73 + (arXiv 2502.09921v2의 21쪽 원문과 ASPLOS ’26 DOI 메타데이터를 대조했습니다. 이 revision은 v2의 새 제목, 시스템명 HILOS, 저자 7명과 v2 평가 결과만 사용합니다. 원문 전체의 설계, 평가 환경, ablation, 비용·에너지·내구성·정확도 결과와 저자 명시 한계를 확인했습니다.)
- Lesson:dwkv doomed chase domino + (chase/demote branch와 domino 분석을 확인했으며 GPU 결과는 prompt-seed audit 경고와 함께 보존함.)
- Lesson:dwkv collinear slo confound + (legacy tier mode와 corrected independent mode의 설계 및 결과 반전을 확인함.)
- Lesson:dwkv legacy patch not repro + (standalone patch의 historical-only 경계와 current tree canonical 규칙을 확인함.)
- Lesson:dwkv kv saturation unproven + (telemetry caveat와 simulator abstraction gap을 확인함.)
- Lesson:dwkv score code contract + (각 policy formula와 focused tests를 확인함.)
- Lesson:dwkv prompt seed bug + (수정 전 bug 설명과 수정 후 deterministic pool/trace 생성 코드를 함께 확인함.)
- Lesson:dwkv failed run fail closed + (실패 수량, recovery commit/SHA, pairing invalid 조건, fail-closed test를 확인함.)
- Lesson:d2fq device direct fair queueing for nvme ssds 36293af6 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_d2fq_device_direct_fair_queueing_for_nvme_ssds_c60d73e1. 확인 범위: full_text. 확인한 자료: https://www.usenix.org/conference/fast21/presentation/woo ; https://www.usenix.org/system/files/fast21-woo.pdf. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:lsm tree a7410f58 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_lsm_tree_76287e58. 확인 범위: official_abstract. 확인한 자료: https://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE12318613 ; https://cslab.yonsei.ac.kr/publications. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:transparently bridging semantic gap in cpu management for virtualized environments 2485a772 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_transparently_bridging_semantic_gap_in_cpu_management_for_virtualized_environme_ddf55f9b. 확인 범위: official_abstract. 확인한 자료: https://doi.org/10.1016/j.jpdc.2010.11.005 ; https://www.sciencedirect.com/science/article/abs/pii/S0743731510002376 ; https://yonsei.elsevierpure.com/en/publications/transparently-bridging-semantic-gap-in-cpu-management-for-virtual/. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:dram 8d56adf1 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_dram_0a5cae63. 확인 범위: official_abstract. 확인한 자료: https://www.kci.go.kr/kciportal/ci/sereArticleSearch/ciSereArtiView.kci?sereArticleSearchBean.artiId=ART003203192. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:improving application launch performance in smartphones using recurrent neural network 8cfcaeb5 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_improving_application_launch_performance_in_smartphones_using_recurrent_neural_47c597b7. 확인 범위: official_abstract. 확인한 자료: https://doi.org/10.1145/3231884.3231897 ; https://yonsei.elsevierpure.com/en/publications/improving-application-launch-performance-in-smartphones-using-rec-2/. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:gpu c88d9a4d + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_gpu_e130421c. 확인 범위: metadata_only. 확인한 자료: https://www.riss.kr/search/Search.do?colName=re_a_kor&isDetailSearch=Y&queryText=znCreator%2C%EC%95%88%EB%AF%BC%EC%9A%B0%28Minwoo+Ahn%29&searchGubun=true ; https://cslab.yonsei.ac.kr/publications. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:selective memory deduplication for cost efficiency in mobile smart devices 9f3139a0 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_selective_memory_deduplication_for_cost_efficiency_in_mobile_smart_devices_ef7d0fd2. 확인 범위: official_abstract. 확인한 자료: https://doi.org/10.1109/TCE.2014.6852004 ; https://yonsei.elsevierpure.com/en/publications/selective-memory-deduplication-for-cost-efficiency-in-mobile-smar/. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:filter lsm tree 89fd8853 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_filter_lsm_tree_4641bf5f. 확인 범위: partial_source. 세부 범위: official_abstract_partial. 확인한 자료: https://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE11224364 ; https://cslab.yonsei.ac.kr/publications. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:demand based coordinated scheduling for smp vms a57bd76a + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_demand_based_coordinated_scheduling_for_smp_vms_3d4e78ab. 확인 범위: official_abstract. 확인한 자료: https://doi.org/10.1145/2451116.2451156 ; https://doi.org/10.1145/2499368.2451156 ; https://yonsei.elsevierpure.com/en/publications/demand-based-coordinated-scheduling-for-smp-vms/. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:identifying on off cpu bottlenecks together with blocked samples 1f04444a + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_identifying_on_off_cpu_bottlenecks_together_with_blocked_samples_2f1283b1. 확인 범위: full_text. 확인한 자료: https://www.usenix.org/conference/osdi24/presentation/ahn ; https://www.usenix.org/system/files/osdi24-ahn.pdf. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:cache scheme of shared buffer mappings for energy efficiency of mobile devices 4b6db791 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_cache_scheme_of_shared_buffer_mappings_for_energy_efficiency_of_mobile_devices_f1dee859. 확인 범위: official_abstract. 확인한 자료: https://doi.org/10.1049/el.2015.0244 ; https://yonsei.elsevierpure.com/en/publications/cache-scheme-of-shared-buffer-mappings-for-energy-efficiency-of-m/. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:zero copying i o stack for low latency ssds dc409093 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_zero_copying_i_o_stack_for_low_latency_ssds_fbe45009. 확인 범위: official_abstract. 확인한 자료: https://yonsei.elsevierpure.com/en/publications/zero-copying-io-stack-for-low-latency-ssds ; https://doi.org/10.1109/LCA.2021.3064876. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:transparent and selective real time interrupt services for performance improvement 6b173779 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_transparent_and_selective_real_time_interrupt_services_for_performance_improvem_b78f264b. 확인 범위: official_abstract. 확인한 자료: https://doi.org/10.1007/978-3-540-75664-4_28 ; https://yonsei.elsevierpure.com/en/publications/transparent-and-selective-real-time-interrupt-services-for-perfor/ ; https://opendl.ifip-tc6.org/db/conf/seus/seus2007/index.html. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:a performance stable numa management scheme for linux based hpc systems 6533e8f2 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_a_performance_stable_numa_management_scheme_for_linux_based_hpc_systems_e846c351. 확인 범위: full_text. 확인한 자료: https://yonsei.elsevierpure.com/en/publications/a-performance-stable-numa-management-scheme-for-linux-based-hpc-s/ ; https://doi.org/10.1109/ACCESS.2021.3069991. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:exploiting asymmetric cpu performance for fast startup of subsystem in mobile smart devices c00616ec + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_exploiting_asymmetric_cpu_performance_for_fast_startup_of_subsystem_in_mobile_s_f33a336a. 확인 범위: official_abstract. 확인한 자료: https://doi.org/10.1109/TCE.2015.7064117 ; https://yonsei.elsevierpure.com/en/publications/exploiting-asymmetric-cpu-performance-for-fast-startup-of-syst/. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:performance optimization of object tracking algorithms in opencv on gpus 8158d2ec + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_performance_optimization_of_object_tracking_algorithms_in_opencv_on_gpus_09f20f75. 확인 범위: full_text. 확인한 자료: https://www.mdpi.com/2076-3417/12/15/7801 ; https://doi.org/10.3390/app12157801. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:a neural network accelerator for mobile application processors 72ce8850 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_a_neural_network_accelerator_for_mobile_application_processors_d4383cb5. 확인 범위: official_abstract. 확인한 자료: https://doi.org/10.1109/TCE.2015.7389812 ; https://yonsei.elsevierpure.com/en/publications/a-neural-network-accelerator-for-mobile-application-processors/. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:transparently exploiting device reserved memory for application performance in mobile systems 43e55454 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_transparently_exploiting_device_reserved_memory_for_application_performance_in_d2f8d46b. 확인 범위: official_abstract. 확인한 자료: https://doi.org/10.1109/TMC.2015.2504934 ; https://yonsei.elsevierpure.com/en/publications/transparently-exploiting-device-reserved-memory-for-application-p/. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:transparent smartphone memory expansion 5ad5fd6a + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_transparent_smartphone_memory_expansion_f1adb2b8. 확인 범위: official_abstract. 확인한 자료: https://yonsei.elsevierpure.com/en/publications/transparent-smartphone-memory-expansion/ ; https://doi.org/10.1145/3672608.3707936 ; https://web.comp.polyu.edu.hk/sac25msc/accept.html. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:a fully associative tagless dram cache f6383680 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_a_fully_associative_tagless_dram_cache_8377cc32. 확인 범위: official_abstract. 확인한 자료: https://doi.org/10.1145/2749469.2750383 ; https://yonsei.elsevierpure.com/en/publications/a-fully-associative-tagless-dram-cache/. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:a secure fast and resource efficient serverless platform with function rewind 6c6658bb + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_a_secure_fast_and_resource_efficient_serverless_platform_with_function_rewind_588a4b15. 확인 범위: full_text. 확인한 자료: https://www.usenix.org/conference/atc24/presentation/song ; https://www.usenix.org/system/files/atc24-song.pdf ; https://github.com/s3yonsei/rewind_serverless. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)
- Lesson:memsos os guided selective memory mirroring ac9aab48 + (정본 Lesson 보강 근거. 검토 원본: Lesson:technical_r … 정본 Lesson 보강 근거. 검토 원본: Lesson:technical_review_memsos_os_guided_selective_memory_mirroring_4aec983d. 확인 범위: official_abstract. 확인한 자료: https://2026.hpca-conf.org/details/hpca-2026-main-conference/20/MemSOS-OS-Guided-Selective-Memory-Mirroring ; https://doi.org/10.1109/HPCA68181.2026.11408560. 질문, 방법, 평가, 해석, 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다., 재사용 교훈, 적용 범위와 한계를 같은 Lesson 본문에 통합했습니다.)